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Showing posts from August, 2025

I Want to Save Operating Point Info At Certain Time Points of a Transient Run In Spectre. How to Fill Out the ADE Transient Options Form?

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You won't find it written down anywhere, but, you HAVE to have the box checked for "Save Final Op Pt". How are you supposed to know that? IDK. Why Cadence can't after 30 or 40 years give you a tooltip when you enter value into the infotimes field? IDK. So, if you're running to 10 us and you want to be able to look at OP info at 1 us (say) and you DON'T care about final OP (at 10 us), you still have to check that box and enter 1 us in the infotimes field. And you're good to go. Sim done, go to Results > Annotate > Transient Operating Point Info and choose the correct time in the resulting dialog.

A Bindkey to Move the Selected Trace to a New Strip in ViVA

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The old way hiSetBindKey( "vivaGraph" "Shift <key>m" "_ddtExecuteAction(awvGetCurrentWindow()->vivaSession \"moveTracesNewStrip\")") And the new way Click to copy Copied!

SOSGetLatestAuthor - A Way to Show on Your Schematic Who Did the Latest Check-in of this Schematic

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All you need is to have (somewhere in the symbol view of the title-block cell that you'll place on your schematic : SOSGetLatestAuthor(ilInst~>cellView) . And, of course, ensure all users load the below SKILL by putting it in the project's setup files - maybe a proj.cdsinit? Copy procedure( SOSGetLatestAuthor(cv) let( (dd ddPath waRoot output resTable) dd = ddGetObj(cv->libName cv->cellName cv->viewName) ddPath = SosGetObjWritePath(dd) waRoot = SosGetWARoot(ddPath 1) output = SosCmd( ?waRoot waRoot ?cmd "nobjstatus" ?options "-gaAll" ?pathList list(ddPath) ) resTable = SosCmdParse(?results output) resTable[car(resTable->?)]["CheckedInBy"] ) )

Is There a Workaround for the Case of a PDK Not Supporting Split Resistor Import Correctly?

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Never had a problem with TSMC, but UMC was always a nightmare, as Sunny of Qorvo might attest. Thankfully, Sandeep's SKILL coding skills came to the rescue. Get this file here . You select all the newly imported resistors, do CTRL-M to go back into grouped mode, and then fire the weapon. Problem : in the PDK I was in, import in split mode brought each segment in with W/N (N = number of stripes). In addition, a common problem in most PDKs is that segments brought in in split mode (that is, when the series-factors setting was set to include the variable (in the CDF for the primitive) that refers to (in this case, stripes, or segments - "ser")) are not linked to the schematic instance (cross-selection not working) when user returns to parallel mode (CTRL-M if you have this script). You will see that the R value hasn't been updated. That led to 46926230: As the video shows, the R value is still incorrect.  Is there a simple workaround for this? Some command we can run to...

TRW and the Wrong Way - Changing a Property on All Instances of a Cell

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Properties usually apply to primitives (MOSFET, R, C, etc). Your schematic has a few FETs making up a current mirror (say). You want to increase the L of all of those making up the mirror. What's the easiest (right) way and what's the common (wrong) way? Wrong way Assume that the type of FETs (cell from the PDK) making up the diode and output sources are used ONLY in the mirror.  You could select one, press q to bring up the property form and then change to "All" and then make the change. Cost - you'll have to change the "All" back to "only current" - else it's going to work against you when you don't want it to, later.. Another wrong way - select all (in this case, unnecessary, but necessary if there are other components besides the mirror using that primitive) - and use the properties form with the "Apply to" changed to "All selected" The Right Way Install my bindkeys so that you have ALT+SHIFT+Q available to apply...

Setting Pin Test Height to Auto by Default (cdsinit/cdsenv)

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Somehow, they missed this one. Luckily, you can do envSetVal("layout" "pinTextAutoHeight" 'boolean t) ; in your .cdsinit or, in your .cdsenv: layout pinTextAutoHeight ‘boolean t Case Abstract Using save defaults of the modified variables, one can find out the settings needed for custom pin layer, size, etc. However, I couldn't find what needs to be set for this one to be "checked". Please share if you can find out how it is to be done through envSetVal (preferred over cdsenv because I don't know if local (proj dir) .cdsenv will be loaded like local .cdsinit).

See if Your Oscillator Stops - By Capturing Last Time Point in the Frequency Waveform

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You really wish they had something easier on the eyes, but they done. This is the way to get the x-value of the last point in the waveform. Click to copy Copied!

What Happened to Options > Layout XL in IC23?

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Ans : It's in Options > Connectivity

Why Isn't Your Layout Bindkey Working in Layout XL?

Unfortunately, the application type, or name, is "Virtuoso XL". So you might need an additional definition: hiSetBindKey("Layout" "Ctrl <Key>m" "toglImportSplitRseg()") hiSetBindKey("Virtuoso XL" "Ctrl <Key>m" "toglImportSplitRseg()") How do you get the Application type? hiGetAppType(window(enclosed_number))   When you see 12(23) in the lower left corner of a window, use 23 in this command in the CIW

veriloga Debugging - $strobe Vs $display

$strobe vs $display in Verilog and Verilog-A: Understanding the Difference Summary: $display prints immediately when called, while $strobe prints at the end of the current simulation time step. In mixed-signal simulations, $strobe often produces cleaner, chronologically ordered logs. Why timing of print statements matters In both Verilog and Verilog-A, simulation events can occur at the same time. This is common in mixed-signal designs where analog events, digital edges, and timers may coincide. Printing in the middle of these updates (as $display does) can lead to logs that look out of order. $strobe avoids this by printing only after all events for that time step have completed. Rule of thumb: Use $display for immediate, step-by-step debugging; use $strobe for clean, time-aligned logs. Key differences Task When it prints Best for Drawbacks $display Immediately when executed Inspecting execution ...

Help - I Get Nothing Out of a Block and a Signal Connected to that Block is Not Available for Plotting

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A classic case of having an empty schematic view. You used APS, didn't you? It throws away voltage sources that are connected to nothing. So, check the schematic. Maybe you meant to use the veriloga view.